Aleksandr
FPGA developer. IP development for FPGA and CPLD, test environment and custom documentation in verilog and systemverilog languages. Helping students solve problems. Payment is contractual. I have work…
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FPGA developer. IP development for FPGA and CPLD, test environment and custom documentation in verilog and systemverilog languages. Helping students solve problems. Payment is contractual. I have work…
Education: In 2012 he graduated from the Master’s degree program of Chernihiv State Technological University with a degree in Specialized Computer Systems. From 2011 to 2012 he graduated with honors f…
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